1. Field of the Invention
This invention relates to power converters in computer systems and digital systems, and more particularly to designing a DC-to-DC voltage converter.
2. Description of the Related Art
DC-to-DC conversion is often performed by having switching power regulators, or step-down regulators, converting a higher voltage (e.g. 12V) to a lower value as required by one or more load devices. A common architecture features distribution of the higher voltage to multiple power regulators, each producing a different (or possibly the same) voltage to one or more loads. Switching power regulators often use two or more power transistors to convert energy at one voltage to another voltage. One common example of such a power regulator, commonly called a “Buck regulator”, implemented with MOS devices is shown in FIG. 1. Buck regulator 100 may be configured to operate in the PWM mode, switching a P-channel device 108 and an N-channel device 110 in order to produce a square-wave at their common node LX. The produced square-wave can be smoothed out using an LC circuit comprising inductor 112 and capacitor 114 to produce the desired voltage, Vout. A control loop, comprised of an error amplifier 116 and a Control Logic block 102 can be configured to control the duty-cycle of the output square-wave, thereby controlling switching P-channel device 108 and N-channel device 110, and hence the resulting value of Vout. In general, transistors 108 and 110 are controlled such that they do not conduct current at the same time. Typically, when transistor 108 is turned on (Vg_P is logic 0), transistor 110 is turned off (Vg_N is logic 0), and when transistor 108 is turned off (Vg_P is logic 1), transistor 100 is turned on (Vg_N is logic 1). IL represents the load current flowing in inductor 112.
In addition to operating in PWM mode, Buck regulator 100, and other regulators, may also be configured to operate in PFM (pulse-frequency mode—also known as skip mode). One example of a synchronous buck regulator that can operate in both modes is the Micrel MIC2177. FIG. 2 shows a simplified functional diagram of the MIC2177 configured to operate in PFM. During PFM operation of regulator circuit 200 the output P-channel device 120 is turned on at a frequency and duty cycle that is a function of VIN, VOUT, and the value L1 of inductor 122. While in PFM, the N-channel device 121 coupled to P-channel device 120 is kept turned off to optimize efficiency by reducing gate charge dissipation. VOUT is regulated by skipping switching cycles that turn on P-channel device 120. Comparator 126 regulates VOUT by controlling when regulator circuit 200 skips cycles. It compares the voltage at node FB (VFB) to the reference voltage (VREF) and has 10 mV of hysteresis to prevent oscillations in the control loop. When VFB is less than VREF−5 mV, the output of comparator 126 is logic 1, allowing P-channel device 120 to turn on. Conversely, when VFB is greater than VREF+5 mV, P-channel device 120 is turned off. Although regulator circuit 200 operates in PFM, it requires external “catch” diode 124 for its operation, which increases the cost of building a regulator using regulator circuit 200.
Many other problems and disadvantages of the prior art will become apparent to one skilled in the art after comparing such prior art with the present invention as described herein.